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authorlichenyang <lichenyang@loongson.cn>2020-07-20 06:30:36 (GMT)
committerlichenyang <lichenyang@loongson.cn>2020-07-20 06:30:36 (GMT)
commita7f4d4b12452ac167917cefc8ad26be532aec455 (patch)
tree7cf8056f62daaf0972d22f36514dd19eb7ac90d2
parent6556de77d8f39b6f0b25b62728f446a2266277d2 (diff)
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drm/radeon&amdgpu: Fixed spline screen after opening write-combine.gfx-devrefs/changes/15/11815/1
1.radeon_object.c Removed the WC property of VRAM from the radeon_ttm_placement_from_domain function. 2.amdgpu_object.c The WC property of VRAM in the amdgpu_ttm_placement_init function was removed. Change-Id: Idb8aa456ea8ba248eeea972b4744ca8d2860bebc Signed-off-by: lichenyang <lichenyang@loongson.cn>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c11
2 files changed, 6 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 1a6d0fa..f328634 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -130,8 +130,7 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
places[c].fpfn = 0;
places[c].lpfn = lpfn;
- places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
- TTM_PL_FLAG_VRAM;
+ places[c].flags = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM;
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
places[c].lpfn = visible_pfn;
else
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index f248b44..b8cc9bb 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -113,8 +113,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
}
rbo->placements[c].fpfn = 0;
- rbo->placements[c++].flags = TTM_PL_FLAG_WC |
- TTM_PL_FLAG_UNCACHED |
+ rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
TTM_PL_FLAG_VRAM;
}
@@ -124,7 +123,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
rbo->placements[c].fpfn = 0;
rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
TTM_PL_FLAG_TT;
-
+
} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
(rbo->rdev->flags & RADEON_IS_AGP)) {
rbo->placements[c].fpfn = 0;
@@ -143,7 +142,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
rbo->placements[c].fpfn = 0;
rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
TTM_PL_FLAG_SYSTEM;
-
+
} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
rbo->rdev->flags & RADEON_IS_AGP) {
rbo->placements[c].fpfn = 0;
@@ -167,7 +166,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
rbo->placements[c].fpfn = 0;
rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
TTM_PL_FLAG_TT;
-
+
} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
(rbo->rdev->flags & RADEON_IS_AGP)) {
rbo->placements[c].fpfn = 0;
@@ -186,7 +185,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
rbo->placements[c].fpfn = 0;
rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
TTM_PL_FLAG_SYSTEM;
-
+
} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
rbo->rdev->flags & RADEON_IS_AGP) {
rbo->placements[c].fpfn = 0;